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 LTC1061 High Performance Triple Universal Filter Building Block
FEATURES
s s s s
DESCRIPTIO
s s s
s
s s
Up to 6th Order Filter Functions with a Single 20-Pin 0.3" Wide Package Center Frequency Range up to 35kHz fO x Q Product up to 1MHz Guaranteed Center Frequency and Q Accuracy Over Temperature Guaranteed Low Offset Voltages Over Temperature 90dB Signal-to-Noise Ratio Filter Operates from Single 4.7V Supply and up to 8V Supplies Guaranteed Filter Specifications with 5V Supply and 2.37V Supply Low Power Consumption with Single 5V Supply Clock Inputs T 2L and CMOS Compatible
The LTC1061 consists of three high performance, universal filter building blocks. Each filter building block together with an external clock and 2 to 5 resistors can produce various second order functions which are available at its three output pins. Two out of three always provide lowpass and bandpass functions while the third output pin can produce highpass or notch or allpass. The center frequency of these functions can be tuned with an external clock or an external clock and a resistor ratio. For Q < 5, the center frequency ranges from 0.1Hz to 35kHz. For Qs of 10 or above, the center frequency ranges from 0.1Hz to 28kHz. The LTC1061 can be used with single or dual supplies ranging from 2.37V to 8V (or 4.74V to 16V). When the filter operates with supplies of 5V and above, it can handle input frequencies up to 100kHz. The LTC1061 is compatible with the LTC1059 single universal filter and the LTC1060 dual. Higher than 6th order functions can be obtained by cascading the LTC1061 with the LTC1059 or LTC1060. Any classical filter realization can be obtained. The LTC1061 is manufactured by using Linear Technology's enhanced LTCMOSTM silicon gate process.
APPLICATI
s s
S
s s
High Order, Wide Frequency Range Bandpass, Lowpass, Notch Filters Low Power Consumption, Single 5V Supply, Clock-Tunable Filters Tracking Filters Antialiasing Filters
LTCMOSTM is a trademark of Linear Technology Corp.
TYPICAL APPLICATI
6th Order, Clock-Tunable, 0.5dB Ripple Chebyshev BP Filter
fCLK = 1MHz 2kHz
9.31k 1k 165k 4.99k 165k VIN < 100kHz 1 2 3 4 5 6 7.5V T CLK IN < 1.2MHz
2
20 19 18 17 LTC1061 16 15 14 13 12 11 VOUT
1061 TA01
78.7k 4.99k 23.7k 49.9k V - = -7.5V 4.99k 165k 5.49k
-20
FILTER GAIN (dB)
-40
-60
7 8 9
-80
V + = 7.5V
10
-100 0 10 20 30 40 INPUT FREQUENCY GAIN (kHz) 50
LTC1061 * TA02
U
Amplitude Response
0
UO
UO
1
LTC1061 ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW LPA BPA NA INVA S1A AGND 50/100/HOLD CLK LSh 1 2 3 4 5 6 7 8 9 20 LPB 19 BPB 18 NB 17 INVB 16 S1B 15 V - 14 LPC 13 BPC 12 HPC 11 INVC
Supply Voltage ....................................................... 18V Power Dissipation............................................. 500mW Operating Temperature Range LTC1061AC, LTC1061C ............ -40C TA 85C LTC1061AM, LTC1061M ......... -55C TA 125C Storage Temperature Range ................ -65C to 150C Lead Temperature (Soldering, 10 sec.)................ 300C
ORDER PART NUMBER LTC1061AMJ LTC1061MJ LTC1061ACJ LTC1061CJ LTC1061ACN LTC1061CN LTC1061CS
V + 10
N PACKAGE J PACKAGE 20-LEAD CERAMIC DIP 20-LEAD PLASTIC DIP S PACKAGE 20-LEAD PLASTIC SOL
TJMAX = 125C, JA = 100C/W (J) TJMAX = 100C, JA = 100C/W (N) TJMAX = 100C, JA = 85C/W (S)
Consult factory for Industrial grade parts
ELECTRICAL CHARACTERISTICS
(Complete Filter)VS = 5V, TA = 25C, T2L clock input level, unless otherwise specified.
PARAMETER Center Frequency Range, fO CONDITIONS fO x Q 175kHz, Mode 1, VS = 7.5V fO x Q 1.6MHz, Mode 1, VS = 7.5V fO x Q 75kHz, Mode 3, VS = 7.5V fO x Q 1MHz, Mode 3, VS = 7.5V MIN TYP 0.1-35k 0.1-25k 0.1-25k 0.1-17k 0-200k Sides A, B: Mode 1, R1 = R3 = 50k R2 = 5k, Q = 10, fCLK = 250kHz Pin 7 High. Side C: Mode 3, R1 = R3 = 50k R2 = R4 = 5k, fCLK = 250kHz Same as Above, Pin 7 at Mid-Supplies, fCLK = 500kHz
q q
MAX
UNITS Hz Hz Hz Hz Hz
Input Frequency Range Clock-to-Center Frequency Ratio, fCLK /fO LTC1061A LTC1061
50 0.6% 50 1.2% 100 0.6% 100 1.2%
LTC1061A LTC1061 Clock-to-Center Frequency Ratio, Side-to-Side Matching LTC1061 Q Accuracy LTC1061A LTC1061 fO Temperature Coefficient Q Temperature Coefficient
q q
1.2% Sides A, B, Mode 1 Side C, Mode 3 fO x Q 50kHz, fO x 5kHz Mode 1, 50:1, fCLK < 300kHz Mode 1, 100:1, fCLK < 500kHz Mode 3, fCLK < 500kHz
q q
2 3 1 5 5
5 5
ppm/C ppm/C ppm/C
2
U
% %
W
U
U
WW
W
LTC1061
ELECTRICAL CHARACTERISTICS
(Complete Filter)VS = 5V, TA = 25C, T2L clock input level, unless otherwise specified.
PARAMETER DC Offset Voltage VOS1, Figure 23 VOS2 VOS2 VOS3, LTC1061CN, ACN/LTC1061CS VOS3, LTC1061CN, ACN/LTC1061CS Clock Feedthrough Maximum Clock Frequency Power Supply Current
q
CONDITIONS
q q q q q
MIN
TYP 2 3 6 3 6 0.4 2.5
MAX 15 30 60 20/25 40/50
UNITS mV mV mV mV mV mVRMS MHz
fCLK = 250kHz, 50:1 fCLK = 500kHz, 100:1 fCLK = 250kHz, 50:1 fCLK = 500kHz, 100:1 fCLK < 1MHz Mode 1, Q < 5, VS 5
6
8
11 15
mA mA
(Complete Filter)VS = 2.37V, TA = 25C, unless otherwise specified.
Center Frequency Range, fO Input Frequency Range Clock-to-Center Frequency Ratio LTC1061A LTC1061 LT1061A LT1061 Q Accuracy LTC1061A LTC1061 Maximum Clock Frequency Power Supply Current 50:1, fCLK = 250kHz, Q = 10 Sides A, B: Mode 1 Side C, Mode 3, 250kHz 100:1, fCLK = 500kHz, Q = 10 Sides A, B: Mode 1 Side C: Mode 3 Same as Above fO x Q 120kHz, Mode 1, 50:1 fO x Q 120kHz, Mode 3, 50:1 0.1- 12k 0.1- 10k 0 - 20k 50 0.6% 50 1.0% 100 0.6% 100 1.0% Hz Hz Hz
2 3 700 4.5 6
% % kHz mA
(Internal Op Amps) TA = 25C, unless otherwise specified.
Supply Voltage Range Voltage Swings LTC1061A LTC1061 LTC1061, LTC1061A Output Short-Circuit Current Source/Sink DC Open-Loop Gain GBW Product Slew Rate VS = 5V, RL = 5k (Pins 1,2,13,14,19,20) VS = 5V, RL = 3.5k (Pins 3,12,18)
q
2.37 4.0 3.8 3.6 4.2 4.2
9
V V V V mA dB MHz V/s
VS = 5V VS = 5V, RL = 5k VS = 5V VS = 5V
40/3 80 3 7
The q denotes the specifications which apply over the full operating temperature range.
3
LTC1061
TYPICAL PERFOR A CE CHARACTERISTICS
Mode 1, Mode 3 (fCLK/fO) Deviation vs Q
0.4 0
% DEVIATION (fCLK /fO)
0.1
% DEVIATION (fCLK /fO)
VS = 5V TA = 25C fCLK = 500kHz
DEVIATION OF fCLK /fO WITH RESPECT TO Q = 10 MEASUREMENT (%)
VS = 5V TA = 25C fCLK = 250kHz fCLK /fO = 50 (TEST POINT)
-0.4 -0.8 -1.2 -1.6 -2.0 -2.4
.
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 fCLK /fO = 100 (TEST POINT)
.
0.1
1 IDEAL Q
10
Mode 1: (fCLK/fO) = 50:1
TA = 25C fCLK /fO = 50/1 VS = 2.5V 10 50 Q<5 20 VS = 7.5V
DEVIATION FROM IDEAL Q (%)
DEVIATION FROM IDEAL Q (%)
30 20 10 0
50
30 20 10 0
DEVIATION FROM IDEAL Q (%)
TA = 25C fCLK /fO = 50/1 30 20 10 0 0 4 8 50
VS = 5V 20 10 Q<5
12 16 20 24 28 32 36 40 CENTER FREQUENCY (kHz)
1061 G04
Mode 3: (fCLK/fO) = 100:1
2.5
30 20 10 0
ERROR FROM IDEAL fCLK /fO (%)
DEVIATION FROM IDEAL Q (%)
VS = 2.5V 10 Q=20 Q=5 20
VS = 7.5V 10 Q=5 Q=1
0.5 0
ISUPPLY (mA)
30 20 10 0 0 4 Q=20
VS = 5V 10 Q=5 Q=1 8 12 16 20 24 CENTER FREQUENCY (kHz) 28 32
4
UW
LTC1061 G01
Mode 1, Mode 3 (fCLK/fO) Deviation vs Q
Mode 3: Deviation of (fCLK/fO) with Respect to Q = 10 Measurement
VS = 5V TA = 25C PIN 7 AT 100:1 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0.1 1 IDEAL Q
LTC1061 G02 LTC1061 G03
0
fCLK /fO = 500:1 R2/R4 = 1/5 (A) R2/R4 = 1/2 fCLK /fO = 200:1 (B)
100
0.1
1 IDEAL Q
10
100
10
100
Mode 1: (fCLK/fO) = 100:1
20 10
Mode 3: (fCLK/fO) = 50:1
TA = 25C fCLK /fO = 50/1 VS = 7.5V 10 5 5 Q=1 20 2.5 Q=1
VS = 2.5V Q=20 10 Q<5
VS = 7.5V Q=20
30 20 10 0
VS = 2.5V 20 10 TA = 25C fCLK /fO = 50:1
Q<5
10 Q=5
30 20 10 0 0 4
VS = 5V 10 Q=20 Q=5
30 20 10
20
VS = 5V 10 5 2.5 Q=1
8 12 16 20 24 CENTER FREQUENCY (kHz)
32
28
0
0
4
8
12 16 20 24 28 32 36 40 CENTER FREQUENCY (kHz)
1061 G06
1061 G05
fCLK/fO vs fO
2.0 1.5 1.0 Q = 10 TA = 25C fCLK /fO = 50/1 VS = 2.5V MODE 1, MODE 3 30 VS = 7.5V VS = 5V MODE 1 MODE 3 MODE 3 VS = 5V MODE 1,3 VS = 2.5V MODE 1,3 Q = 10 TA = 25C fCLK /fO = 100/1 MODE 1 27 24 21 18 15 12 9 6 3 0
Power Supply Current vs Supply Voltage
TA = -55C
TA = 25C
1.5 1.0 0.5 0 0
TA = 125C
VS = 7.5V MODE 1,3 4 8 12 16 20 24 28 32 36 40 CENTER FREQUENCY (kHz)
1061 G08
0
1
23456789 POWER SUPPLY VOLTAGE (V)
10
1061 G07
1061 G09
LTC1061
BLOCK DIAGRA S
NA (3) CLK (8) LEVEL SHIFT CLOCK GENERATOR INVA (4) TO FILTER A BPA (2) LPA (1)
LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT (9)
PI DESCRIPTIO A D APPLICATIO HI TS
Power Supplies (Pins 10, 15) They should be bypassed with 0.1F disc ceramic. Low noise, nonswitching, power supplies are recommended. The device operates with a single 5V supply, Figure 1, and with dual supplies. The absolute maximum operating power supply voltage is 9V. Clock and Level shift (Pins 8, 9) When the LTC1061 operates with symmetrical dual supplies the level shift Pin 9 should be tied to analog ground. For single 5V supply operation, the level shift pin should be tied to Pin 15 which will be the system ground. The typical logic threshold levels of the clock pin are as follows: 1.65V above the level shift pin for 5V supply operation, 1.75V for 7.5V and above, and 1.4V for single 5V supply operation. The logic threshold levels vary 100mV over the full military temperature range. The recommended duty cycle of the input clock is 50% although for clock frequencies below 500kHz the clock "on" time can be as low as 300ns. The maximum clock frequency for 5V supplies and above is 2.4MHz. S1A, S1B (Pins 5, 16) These are voltage input pins. If used, they should be driven with a source impedance below 5k. when they are not used, they should be tied to the analog ground Pin 6. AGND (Pin 6) When the LTC1061 operates with dual supplies, Pin 6 should be tied to system ground. When the LTC1061 operates with a single positive supply, the analog ground pin should be tied to 1/2 supply, Figure 1. The positive input of all the internal op amps, as well as the common reference of all the internal switches, are internally tied to the analog ground pin. Because of this, a "clean" ground is recommended.
U
U
UU
W
- +
+
-
S1A (5) NB (18)
+
+
BPB (19)
LPB (20)
CLOCK GENERATOR
INVB (17) TO FILTER B
- +
+
-
+
S1B (16)
+
HPC (12) CLOCK GENERATOR INVC (11) TO FILTER C
BPC (13)
LPC (14)
- +
+ +
50/100/ HOLD (7)
AGND (6)
V+ (10)
V- (15)
1061 BD
U
5
LTC1061
PI DESCRIPTIO A D APPLICATIO HI TS
R1 VOUT 1 R3 R2 2 3 4 5 2.49k LTC1061 6 7 8 2.49k 9 10 0.1F T2L CLOCK IN fCLK < 1MHz
LTC1061 F01
Clock Feedthrough
20 19 18 17 16 15 14 13 12 11 R1 CIN VIN R1 R4 R3 R2 R3 R2
This is defined as the amplitude of the clock frequency appearing at the output pins of the device, Figure 2. Clock feedthrough is measured with all three sides of the LTC1061 connected as filters. The clock feedthrough mainly depends on the magnitude of the power supplies and it is independent from the input clock levels, clock frequency and modes of operation. The Table 2 illustrates the typical clock feedthrough numbers for various power supplies.
+
1F
5V
Figure 1. the 6th Order LP Butterworth Filter of Figure 5 Operating with a Single 5V Supply.
A = 2V/DIV
50/100/Hold (Pin 7) By tying Pin 7 to V +, the filter operates with a clock-tocenter frequency internally set at 50:1. When Pin 7 is at mid-supplies, the filter operates with a 100:1 clock-tocenter frequency ratio. Table 1 shows the allowable variation of the potential at Pin 7 when the 100:1 mode is sought. When Pin 7 is shorted to the negative supply pin, the filter operation is stopped and the bandpass and lowpass output act as a sample-and-hold circuit holding the last sample of the input voltage. The hold step is around 2mV and the droop rate is 150V/sec.
Table 1
TOTAL POWER SUPPLY (V) 5 10 15 VOLTAGE RANGE OF PIN 7 FOR 100:1 OPERATION (V) 2.5 0.5 5 1 7.5 1.5
B = 10mV/DIV
Figure 2. Typical Clock Feedthrogh of the LTC1061 Operating with 5V Supplies. Top Trace is the Input Clock Swinging 0V to 5V and Bottom Trace is One of the Lowpass Outputs with Zero or DC Input Signals. Table 2
POWER SUPPLY (V) 2.5 5 8 CLOCK FEEDTHROUGH (VRMS) 0.2 0.4 0.8
Definition of Filter Functions Refer to LTC1060 data sheet.
6
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U
HORIZONTAL = 10s/DIV
LTC1061
ODES OF OPERATIO
Description and Applications 1. Primary Modes: There are two basic modes of operation, Mode 1 and Mode 3. In Mode 1, the ratio of the external clock frequency to the center frequency of each 2nd order section is internally fixed at 50:1 or 100:1. In Mode 3, this ratio can be adjusted above or below 50:1 or 100:1. The side C of the LTC1061 can be connected only in Mode 3. Figure 3 illustrates Mode 1 providing 2nd order notch, lowpass, and bandpass outputs (for definition of filter functions, refer to the LTC1060 data sheet). Mode 1 can be used to make high order Butterworth lowpass filters; it can also be used to make low Q notches and for cascading 2nd order bandpass functions tuned at the same center frequency and with unity-gain. Mode 3,
R3 R2 N VIN R1 S BP LP
- +
+
-
1/3 LTC1061 AGND fO = fCLK ;f =f 100(50) n O R3 R2 HOLP = - R2 ; HOBP = - ;H =- R1 ON1 R1 R1
Q = R3 R2
Figure 3. Mode 1: 2nd Order Filter Providing Notch, Bandpass, Lowpass
CC R4 R3 R2 HP VIN R1 S BP LP
- +
+
-
1/3 LTC1061 AGND fCLK R2 ; Q = R3 R2 R2 R4 100(50) R4 R3 R4 HOHP = - R2 ; HOBP = - ;H =- R1 OLP R1 R1 fO = 0.16 R4 x 1.2MHz
NOTE: ADD CC FOR Q > 5 AND fCLK > 1MHz, SUCH AS CC
Figure 4. Mode 3: 2nd Order Filter Providing Highpass, Bandpass, Lowpass
U
Figure 4, is the classical state variable configuration providing highpass, bandpass and lowpass 2nd order filter functions. Since the input amplifier is within the resonant loop, its phase shift affects the high frequency operation of the filter and therefore, Mode 3 is slower than Mode 1. Mode 3 can be used to make high order all-pole bandpass, lowpass, highpass and notch filters. Mode 3 as well as Mode 1 is a straightforward mode to use and the filter's dynamics can easily be optimized. Figure 5 illustrates a 6th order lowpass Butterworth filter operating with up to 40kHz cutoff frequency and with up to 200kHz input frequency. Sides A, B are connected in Mode 1 while side C is connected in Mode 3. The lower Q section was placed in side C, Mode 3, to eliminate any early Q enhancement. This could happen when the clock approaches 2MHz. The measured frequency response is shown in Figure 6. The attenuation floor is limited by the crosstalk between the three different sections operating with a clock frequency above 1MHz. The measured wideband noise was 150VRMS. For limited temperature range the filter of Figure 5 works up to 2.5MHz clock frequency thus yielding a 50kHz cutoff.
R13 1 R33 R23 2 3 4 5 LTC1061 6 7 T 2L CLOCK < 2.5MHz 8 9 10 15 14 13 12 11 R11
1061 F04
W
1061 F03
VOUT 20 19 18 17 16 V- R12 R41 R31 R21 R32 R22
V+ VIN
HARMONIC DISTORTION WITH fCLK = 2MHz fIN 10kHz, 1VRMS 20kHz, 1VRMS 30kHz, 1VRMS 40kHz, 1VRMS 2ND HARMONIC -74dB -62dB -62dB -62dB
STANDARD 1% RESISTOR VALUES R11 = 20k R21 = 20k R31 = 11k R41 = 20k R12 = 20k R22 = 20k R32 = 14k R23 = 10k R13 = 10k R33 = 17.8k
LTC1061 F05
Figure 5. 6th Order Butterworth Lowpass Filter with Cutoff Frequency up to 45kHz
7
LTC1061
ODES OF OPERATIO
0 -10
VS 5V TA = 25C VIN = 1VRMS fCLK = 2MHz fC = 40kHz
GAIN (dB)
-20 -30 -40 -50 -60 -70 10k 20k fCLK = 1MHz fC = 20kHz
40k
100k 200k fIN (Hz)
Figure 6. Measures Frequency Response of the Lowpass Butterworth Filter of Figure 3.
R31 R51 R21
2. Secondary Modes: Mode 1b - It is derived from Mode 1. In Mode 1b, Figure 7, two additional resistors, R5 and R6, are added to attenuate the amount of voltage fed back from the lowpass output into the input of the SA (SB) switched capacitor summer. This allows the filter clockto-center frequency ratio to be adjusted beyond 50:1 (or 100:1). Mode 1b still maintains the speed advantages of Mode 1. Figure 8 shows the 3 lowpass sections of the LTC1061 in cascade resulting in a Chebyshev lowpass filter. The side A of the IC is connected in Mode 1b to provide the first resonant frequency below the cutoff frequency of the filter. The practical ripple, obtained by using a non-A version of the LTC1061 and 1% standard resistor values, was 0.15dB. For this 6th order lowpass,
R6 R3 R2 N VIN R1 S BP LP R5
VOUT/VIN (dB)
- +
AGND fO =
+
-
fCLK R6 R6 ; f = f ; Q = R3 R2 R5 + R6 100(50) R5 + R6 n O f HON1 (f 0) = HON2 f CLK = - R2 R1 2 R3 -R2/R1 ; H HOLP = =- ; (R5//R6) <5k R1 R6/(R5 + R6) OBP
(
Figure 7. Mode 1b: 2nd Order Filter Providing Notch, Bandpass, Lowpass
8
U
1M
1061 F06
W
the textbook Qs and center frequencies normalized to the ripple bandwidth are: Q1 = 0.55, fO1 = 0.71, Q2 = 1.03, FO2 = 0.969, Q3 = 3.4, FO3 = 1.17. The design was done with speed in mind. The higher (Q3, FO3) section was in Mode 1 and placed in the side B of the LTC1061. The remaining two center frequencies were then normalized with respect to the center frequency of side B; this changes the ratio of clock-to-cutoff frequency from 50:1 to 50 x 1.17 = 58.5:1. As shown in Figure 9, the maximum cutoff frequency is about 33kHz. The total wideband output noise is 220VRMS and the measured output DC offset voltage is 60mV.
1 2 3 4 5 LTC1061 6 7 fCLK < 2MHz 8 9 V+ 10
20 19 18 17 16 15 14 13 12 11 R43 R33 R23 R13 V- R32 R22
R12
R11 VIN R61
VOUT
STANDARD 1% RESISTOR VALUES R11 = 35.7k R32 = 36.5k R61 = 2.87k R31 = 11.5k R13 = 15.8k R22 = 11k R51 = 5.49k R33 = 13k R23 = 10.5 R21 = 12.1k R43 = 15.8k R12 = 11k
LTC1061 F08
Figure 8. 6th Order Chebyshev, Lowpass Filter Using 3 Different Modes of Operation for Speed Optimization
0 -10 -20 -30 -40 -50 -60 -70 10k 100k fIN (Hz)
VS > 5V TA = 25C VIN = 1VRMS fCLK = 1.9MHz
1061 F07
)
30k
1M
1061 F09
Figure 9. Amplitude Response of the 6th Order Chebyshev Lowpass Filter of Figure 8
LTC1061
ODES OF OPERATIO
Another example of Mode 1b is illustrated on the front page of the data sheet. The cascading sequence of this 6th order bandpass filter is shown in block diagram form, Figure 10a. the filter is geometrically centered around the side B of the LTC1061 connected in Mode 1. This dictates a clock-to-center frequency ratio of 50:1 or 100:1. The side A of the IC operates in Mode 1b to provide the lower center frequency of 0.95 and still share the same clock with the rest of the filter. With this approach the bandpass filter can
SIDE A VIN MODE 1b fO1 = 0.95 Q1 = 31.9 SIDE B MODE 1 fO2 = 1 Q2 = 15.9 SIDE C MODE 3 fO3 = 1.05 Q3 = 31.9 VOUT
1061 F10a
Figure 10a. Cascading Sequence of the Bandpass Filter Shown on the Front Page, with (fCLK/fO) = 50:1 or 100:1
SIDE A VIN MODE 1b fO1 = 0.95 Q1 = 31.9 SIDE B MODE 1 fO2 = 1.05 Q2 = 31.9 SIDE C MODE 3 fO3 = 1 Q3 = 15.9 VOUT
1061 F10b
Figure 10b. Cascading Sequence of the Same Filter for Speed Optimization, and with (fCLK/fO) = 52.6:1
R4 R3 R2 HP VIN R1 S BP LP
- +
AGND
R3 R4 R2 Rh R2 ; f = fCLK ; HOHP = - ; HOBP = - ;H =- R1 OLP R1 R4 n 100(50) Rl R1 Rg Rg Rg R2 Rg fCLK R4 ; H x f = x ; H (f = fO) = Q H - H HON1 (f 0) = Rl OLP Rh OHP Rh R1 ON 2 Rl R1 ON2 f fO = CLK 100(50)
Q = R3 R2
R4
R2 0.16 R4 x 1.2MHz
NOTE: FOR Q > 5 AND fCLK > 1MHz, ADD CC SUCH AS CC
Figure 11. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass, Notch
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operate with center frequencies up to 24kHz. The speed of the filter could be further improved by using Mode 1 to lock the higher resonant frequency of 1.05 and higher Q or 31.9 to the clock, Figure 10b, thus changing the clock to center frequency ratio to 52.6:1. Mode 3a - This is an extension of Mode 3 where the highpass and lowpass outputs are summed through two external resistors Rh and Rl to create a notch, Figure 11. Mode 3a is very versatile because the notch frequency can be higher or lower than the center frequency of the 2nd order section. The external op amp of Figure 11 is not always required. When cascading the sections of the LTC1061, the highpass and lowpass outputs can be summed directly into the inverting input of the next section. Figure 12 shows an LTC1061 providing a 6th order elliptic bandpass or notch response. Sides C and B are connected in Mode 3a while side A is connected in Mode 1 and uses only two resistors. The resulting filter response is then geometrically symmetrical around either the center frequency of side A (for bandpass responses) or the notch frequency of side A (for notch responses).
CC
W
+
-
Rh
Rl
Rg
-
NOTCH
+
EXTERNAL OP AMP OR INPUT OP AMP OF THE LTC1061, SIDES A, B, C
(
)
(
)
1061 F11
9
LTC1061
ODES OF OPERATIO
Rl2 1 R33 R23 2 3 4 5 LTC1061 6 7 15 14 13 12 11 20 19 18 17 16
T 2L, CMOS CLOCK INPUT V+
8 9 10
VOUT/VIN (dB)
VIN NOTES: FOR NOTCH RESPONSES, PIN 7 SHOULD BE PREFERABLY CONNECTED TO GROUND AND THE FILTER OUTPUT IS PIN 3. FOR BANDPASS OR LOWPASS RESPONSES, PIN 7 CAN BE EITHER AT GROUND OR POSITIVE SUPPLY, AND THE FILTER OUTPUT IS PIN 2 OR PIN 1.
LTC1061 F12
Figure 12. 6th Order Elliptic Bandpass, Lowpass or Notch Topology
Figure 13 shows the measured frequency response of the circuit Figure 12 configured to provide a notch function. The filter output is taken out of pin 3. The resistor values are standard 1%. The ratio of the 0dB width, BW1, to the notch width BW2, is 5:1 and matches the theoretical design value. The measured notch depth was -53dB versus -56dB theoretical and the clock-to-center notch frequency ratio is 100:1. Figure 14 shows the measured frequency response of the circuit topology, Figure 12, but with pole/zero locations configured to provide a high Q, 6th order elliptic bandpass filter operating with a clock-to-center frequency ratio of 50:1 or 100:1. The theoretical passband ripple, stopband attenuation and stopband to ripple bandwidth ratio are 0.5dB, 56dB, 5:1 respectively. The obtained results with 1% standard resistor values closely match the theoretical frequency response. For this application, the normalized
VOUT/VIN (dB)
10
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R h2 R42 R32 R22
W
center frequencies, Qs, and notch frequencies are (fO1 = 0.969, Q1 = 54.3, fn1 = 0.84, fO2 = 1.031, Q2 = 54.3, fn2 = 1.187, fO3 = 1, Q3 = 26.2). The output of the filter is the BP output of Side A, Pin 2. Lowpass filters with stopband notches can also be realized by using Figure 12 provided that 6th order lowpass filter approximations with 2 stopband notches can be synthesized. Literature describing elliptic double terminated (RLC)
Rl 1 V- R41 R31 R21
Rh1 R11
0 -10 -20 -30 -40 -50 -60 -70 1.0 VS = 5V fCLK = 260kHz 1.5 BW2
BW1
STANDARD 1% RESISTOR VALUES R11 = 165k R21 = 10k R31 = 143k R41 = 13k Rh1 = 10k Rl1 = 10.5k R22 = 20k R32 = 221k R42 = 15.4k Rh2 = 10.5k R23 = 84.5k Rl2 = 10k R33 = 169k NOTES: USE A 15pF CAPACITOR BETWEEN PINS 17 AND 18. PIN 7 IS GROUNDED.
2.6kHz 2.5 2.0 fIN (kHz) 3.0 3.5
1061 F13
Figure 13. Resistor Values and Amplitude Response of Figure 12 Topology. The Notch is Centered at 2600Hz.
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 1.0
VS = 5V fCLK = 130kHz
STANDARD 1% RESISTOR VALUES R11 = 576k R21 = 10k R31 = 562k R41 = 10.7k Rh11 = 28.7k Rl11 = 40.2k R22 = 10.7k R32 = 562k R42 = 10k Rh2 = 14k R23 = 2.94k Rl2 = 10k R33 = 75k NOTE: FOR CLOCK FREQUENCIES ABOVE 500kHz, CONNECT A 5pF IN PARALLEL WITH R41 AND R42.
1.5
2.5 2.0 fIN (kHz)
3.0
3.5
1061 F14
Figure 14. Resistor Values and Amplitude Response of Figure 12 Topology. The Bandpass Filter is Centered Around 2600Hz when Operating with a 130kHz Clock.
LTC1061
ODES OF OPERATIO
0
-20
VOUT/VIN (dB)
-40 -50 -60 -70 -80 -90 0 1 2 3 456 fIN (kHz) 7 8 9
NOTES: USE A 10pF ACROSS R42 FOR fCLK > 1MHz. THE ELLIPTIC LOWPASS FILTER HAS ONLY TWO NOTCHES IN THE STOPBAND, AND IT OPERATES WITH A CLOCK TO CUTOFF FREQUENCY RATIO OF 50:1. 10
1061 F15
R43 R33 R23
1 2 3 4 5 LTC1061 6 7
Figure 15. Resistor Values and Amplitude Response of the Topology of Figure 12.
passive ladder filters provide enough data to synthesize the above filters. The measured amplitude response of such a lowpass is shown in Figure 15 where the filter output is taken out of side A's Pin 1, Figure 12. The clockto-center frequency ratio can be either 50:1 or 100:1 because the last stage of the LTC1061 operates in Mode 1 with a center frequency very close to the overall cutoff frequency of the lowpass filter. In Figure 16, all three sides of the LTC1061 are connected in Mode 3a. This topology is useful for elliptic highpass and notch filters with clock-to-cutoff (or notch) frequency ratio higher than 100:1. This is often required to extend the allowed input signal frequency range and to avoid premature aliasing. Figure 16 is also a versatile, general purpose architecture providing 3 notches and 4 pole pairs, and there is no restriction on the location of the poles with respect to the notch frequencies. The drawbacks, when compared to Figure 12, are the use of an external op amp and the increased number of the required external resistors. Figure 17 shows the measured frequency of a 6th order highpass elliptic filter operating with 250:1 clock-to-cutoff frequency ratio. With a 1MHz clock, for instance, the filter yields a 4kHz cutoff frequency, thus allowing an input frequency range beyond 100kHz. Band limiting can be easily added by placing a capacitor across the feedback resistor of the external op amp of Figure 16.
T 2Ll, CMOS CLOCK INPUT V+
8 9 10
VIN
Figure 16. Using an External Op Amp to Connect all 3 Sides of the LTC1061 in Mode 3a.
0 -10 -20
fCLK = 250kHz
VOUT/VIN (dB)
-30 -40 -50 -60 -70 -80 -90 0 0.5 1.5 1.0 fIN (kHz) 2.0
Figure 17. Measured Amplitude Response of the Topology of Figure 16, Configured to Provide a 6th Order Elliptic Highpass Filter Operating with a Clock-to-Cutoff Frequency Ratio of 250:1.
+
-30
Rh3
Rl3
-
-10
STANDARD 1% RESISTOR VALUES R21 = 10k R11 = 39.2k R41 = 39.2k R31 = 13.7k Rl1 = 12.4k Rh1 = 20.5k R22 = 10k R32 = 26.7k R42 = 14k Rh2 = 32.4k R23 = 10k Rl2 = 11.8k R33 = 100k
U
Rg LT1056 VOUT 20 19 18 17 16 15 14 13 12 11 Rh1 R11
LTC1061 F16
W
Rl2 R42 R32 R22
Rh2
V-
Rl1 R41 R31 R21
STANDARD 1% RESISTOR VALUES R21 = 10k R11 = 105k R41 = 45.3k R31 = 47.5k Rl1 = 1.07M Rh1 = 10k R22 = 32.4k R32 = 28.7k R42 = 52.3k Rh2 = 42.2k R23 = 10k Rl2 = 750k R33 = 255k R43 = 63.4k Rh3 = 10k Rl3 = 110k Rg = 140k NOTE: FOR CLOCK FREQUENCIES BELOW 500kHz, USE A CAPACITOR IN PARALLEL WITH R21 SUCH AS (1/2R21C) fCLK /3. 2.5
1061 F17
11
LTC1061
ODES OF OPERATIO
Figure 18 shows the plotted amplitude responses of a 6th order notch filter operating again with a clock-to-center notch frequency ratio of 250:1. The theoretical notch depth is 70dB and when the notch is centered at 1kHz its width is 50Hz. Two small, noncritical capacitors were used across the R21 and R22 resistors of Figure 16, to bandlimit the first two highpass outputs such that the practical notch depth will approach the theoretical value. With these two fixed capacitors, the notch frequency can be swept within a 3:1 range. When the circuit of Figure 16 is used to realize lowpass elliptic filters, a capacitor across Rg raises the order of the filter and at the same time eliminates any small clock feedthrough. This is shown in Figure 19 where the amplitude response of the filter is plotted for 3 different cutoff frequencies. When the clock frequency equals or exceeds 1MHz, the stopband notches lose their depth due to the finite bandwidth of the internal op amps and to the small crosstalk between the different sides of the LTC1061. The lowpass filter, however, does not lose its passband accuracy and it maintains nearly all of its attenuation slope. The theoretical performance of the 7th order lowpass filter of Figure 19 is 0.2dB passband ripple, 1.5:1 stopband-tocutoff frequency ratio, and 73dB stopband attenuation. Without any tuning, the obtained results closely approximate the textbook response.
STANDARD 1% RESISTOR VALUES R11 = 84.5k R21 = 10.2k R31 = 31.6k R41 = 63.4k Rh1 = 48.7k Rl1 = 287k R22 = 10k R32 = 232k R42 = 97.6k Rh2 = 10.2k R23 = 20k Rl2 = 66.5k R33 = 300k R43 = 80.6k Rh3 = 10.2k Rl3 = 63.4k Rg = 210k NOTE: CONNECT 39pF AND 100pF ACROSS R21 AND R22 RESPECTIVELY.
VOUT/VIN (dB)
0 -10
VOUT/VIN (dB)
-20 -30 -40 -50 -60 fCLK = 250kHz -70 0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 fIN (kHz)
Figure 18. 6th Order Band Reject Filter Operating with a Clockto-Center Notch Frequency Ratio of 250:1. The Ratio of 0dB to the - 65dB Notch Width is 8:1.
12
U
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 1 4 10 fIN (kHz) 100 fCLK fCLK 200kHz 500kHz fCLK 1MHz STANDARD 1% RESISTOR VALUES R11 = 30.9k R21 = 10k R31 = 16.2k R41 = 26.7k Rh1 = 45.3k Rl1 = 19.6k R22 = 10.5k R32 = 100k R42 = 10k Rh2 = 52.3k R23 = 10k Rl2 = 15.8k R33 = 28.7k R43 = 12.7k Rh3 = 95.3k Rl3 = 10k Rg = 28k NOTE: ADD A CAPACITOR C ACROSS Rg TO CREATE A 7TH ORDER LOWPASS SUCH AS (1/2RgC) = (CUTOFF FREQUENCY) x 0.38
1061 F19
W
Figure 19. Frequency Responses of a 7th Order Lowpass Elliptic Filter Realized with Figure 16 Topology.
Mode 2 - This is a combination of Mode 1 and Mode 3, Figure 20. With Mode 2, the clock-to-center frequency ratio, fCLK/fO, is always less than 50:1 or 100:1. When compared to Mode 3 and for applications requiring 2nd order section with fCLK/fO slightly less than 100 or 50:1, Mode 2 provides less sensitivity to resistor tolerances. As in Mode 1, Mode 2 has a notch output which directly depends on the clock frequency and therefore the notch frequency is always less than the center frequency, fO, of the 2nd order section.
R4 R3 R2 N VIN R1 S BP LP
- +
AGND
+
-
1061 F20
1061 F18
fCLK f 1 + R2 ; fn = CLK ; Q = R3 1 + R2 R4 100(50) 100(50) R4 R2 HOLP = -R2/R1 ; HOBP = - R3 R1 1 + (R2/R4) f R2 HON1 (f 0) = -R2/R1 ; HON2 f CLK = - R1 2 1 + (R2/R4) fO =
(
)
Figure 20. Mode 2: 2nd Order Filter Providing Notch, Bandpass, Lowpass.
LTC1061
ODES OF OPERATIO
Figure 21 shows the side A of the LTC1061 connected in Mode 2 while sides B and C are in Mode 3a. This topology can be used to synthesize elliptic bandpass, highpass and notch filters. The elliptic highpass of Figure 17 is synthesized again, Figure 22, but the clock is now locked onto the
Rh2 Rl2 R43 R33 R23 1 2 3 4 5 LTC1061 6 7 T 2L, CMOS CLOCK INPUT V+ 8 9 10 15 14 13 12 11 Rh1 R11 VIN
LTC1061 F21
20 19 18 17 16 V-
Figure 21. LTC1061 with Side A is Connected in Mode 2 While Side B, C are in Mode 3a. Topology is Useful for Elliptic Highpass, Notch and Bandpass Filters.
0 -10 -20
VOUT/VIN (dB)
-30 -40 -50 -60 -70 -80 -90 0 1 2 3 456 fIN (kHz) 7 8 9
STANDARD 1% RESISTOR VALUES R21 = 24.3k R11 = 54.9k R41 = 10k R31 = 34.8k Rl1 = 280k Rh1 = 28.7k R22 = 68.1k R32 = 18.2k R42 = 10k Rh2 = 10.2k R23 = 10k Rl2 = 16.2k R33 = 75k R43 = 14k NOTE: FOR CLOCK FREQUENCIES ABOVE 300kHz, ADD A CAPACITOR C ACROSS R21 AND R22 SUCH AS (1/2R21C) = fCLK 10
1061 F22
Figure 22. 6th Order Elliptic Highpass Filter Operating with a Clock-to-Cutoff Frequency Ratio of 75:1, and Using the Topology of Figure 21.
U
VOUT R42 R32 R22
W
higher frequency notch provided by the side A of the LTC1061. As shown in Figure 22, the highpass corner frequency is 3.93kHz and the higher notch frequency is 3kHz while the filter operates with a 300kHz clock. The center frequencies, Qs, and notches of Figure 22, when normalized to the highpass cutoff frequency, are (fO1 = 1.17, Q1 = 2.24, fn1 = 0.242, fO2 = 1.96, Q2 = 0.7, fn2 = 0.6, fO3 = 0.987, fn3 = 0.753, Q3 = 10). When compared with the topology of Figure 16, this approach uses lower and more restricted clock frequencies. The obtained notch in Mode 2 is shallower although the topology is more efficient. Output Noise
Rl1 R41 R31 R21
The wideband RMS noise of the LTC1061 outputs is nearly independent from the clock frequency. The LTC1061 noise when operating with 2.5V supply is lower, as Table 3 indicates. The noise at the bandpass and lowpass outputs increases rough as the Q. Also the noise increases when the clock-to-center frequency ratio is altered with external resistors to exceed the internally set 100:1 or 50:1 ratios. Under this condition, the noise increases square root-wise. Output Offsets The equivalent input offsets of the LTC1061 are shown in Figure 23. The DC offset at the filter bandpass output is always equal to VOS3. The DC offsets at the remaining two outputs (Notch and LP) depend on the mode of operation and external resistor ratios. Table 4 illustrates this. It is important to know the value of the DC output offsets, especially when the filter handles input signals with large dynamic range. As a rule of thumb, the output DC offsets increase when: 1. The Qs decrease 2. The ratio (fCLK/fO) increases beyond 100:1. This is done by decreasing either the (R2/R4) or the R6/(R5 + R6) resistor ratios.
13
LTC1061
ODES OF OPERATIO
VS (V) 5.0 5.0 2.5 2.5 5.0 5.0 2.5 2.5 5.0 5.0 2.5 2.5 5.0 5.0 2.5 2.5 fCLK/fO 50:1 100:1 50:1 100:1 50:1 100:1 50:1 100:1 50:1 100:1 50:1 100:1 50:1 100:1 50:1 100:1
NOTCH/HP (VRMS) 45 65 30 40 18 20 15 17 57 72 40 50 135 170 100 125
(11,17) 4
+V
OS1
-- +
6
Figure 23. Equivalent Input Offsets of 1/3 LTC1061 Filter Building Block.
MODE 1 1b 2 3
VOSN PIN 3 (18) VOS1 [(1/Q) + 1 + || HOLP ||] - VOS3/Q VOS1 [(1/Q) + 1 + R2/R1] - VOS3/Q [VOS1 (1 + R2/R1 + R2/R3 + R2/R4) - VOS3(R2/R3)] x x [R4/(R2 + R4)] + VOS2[R2/(R2 + R4)] VOS2
14
U
Table 3. Wideband RMS Noise
BP (VRMS) 55 65 30 40 150 200 100 140 57 72 40 50 120 160 88 115 LP (VRMS) 70 85 45 60 150 200 100 140 62 80 42 53 140 185 100 130 CONDITIONS Mode 1, R1 = R2 = R3 Q=1 Mode 1, Q = 10 R1 = R3 for BP Out R1 = R2 for LP Out Mode 3, R1 = R2 = R3 = R4 Q=1 Mode 3, R2 = R4, Q = 10 R3 = R1 for BP Out R4 = R1 for LP and HP Out
3 (12,18) 2 (13,19) 1 (14,20)
W
+
+ VOS2 -
-
5
- +
+
VOS3
-
- +
1061 F23
Table 4
VOSBP PIN 2 (19) VOS3 VOS3 VOS3 VOS3 VOSLP PIN 1 (20) VOSN - VOS2 ~(VOSN - VOS2)(1 + R5/R6) VOSN - VOS2 VOS1 (1 + R4/R1 + R4/R2 + R4/R3) - VOS2(R4/R2) - VOS3 (R4/R3)
LTC1061
PACKAGE DESCRIPTIO U
Dimensions in inches (millimeters) unless otherwise noted. J Package 20-Lead Ceramic DIP
0.160 (4.064) MAX 0.015 - 0.060 (0.381 - 1.524) 0.200 (5.080) MAX 1.060 (26.924) MAX 20 19 18 17 16 15 14 13 12 11
0.290 - 0.320 (7.366 - 8.128)
0.220 - 0.310 0.025 (5.588 - 7.874) (0.635) RAD TYP 1 2 0.005 (0.127) MIN 3 4 5 6 7 8 9 10
0.008 - 0.018 (0.203 - 0.457)
0 - 15
0.385 0.025 (9.779 0.635)
0.125 (3.175) MIN
0.080 (2.032) TYP
0.038 - 0.068 (0.965 - 1.727) 0.014 - 0.026 (0.356 - 0.660)
0.100 0.010 (2.540 0.254)
N Package 20-Lead Plastic DIP
0.300 - 0.325 (7.620 - 8.255) 0.130 0.005 (3.302 0.127) 0.045 - 0.065 (1.143 - 1.651) 1.040 (26.416) MAX 20 19 18 17 16 15 14 13 12 11
0.009 - 0.015 (0.229 - 0.381)
0.015 (0.381) MIN
0.065 (1.651) TYP 0.125 (3.175) MIN
0.260 0.010 (6.604 0.254)
(
+0.025 0.325 -0.015 +0.635 8.255 -0.381
1 0.065 0.015 (1.651 0.381) 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076)
2
3
4
5
6
7
8
9
10
)
S Package 20-Lead Plastic SOL
0.291 - 0.299 (7.391 - 7.595) 0.005 (0.127) RAD MIN
0.010 - 0.029 x 45 (0.254 - 0.737)
0.496 - 0.512 (12.598 - 13.005) 0.093 - 0.104 (2.362 - 2.642) 0.037 - 0.045 (0.940 - 1.143) 20 19 18 17 16 15 14 13 12 11
0 - 8 TYP 0.050 (1.270) TYP 0.014 - 0.019 (0.356 - 0.482) TYP 2 3 5 7 8 9 10 SEE NOTE 0.004 - 0.012 (0.102 - 0.305) 0.394 - 0.419 (10.007 - 10.643)
0.009 - 0.013 (0.229 - 0.330)
SEE NOTE 0.016 - 0.050 (0.406 - 1.270)
NOTE: PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
1
4
6
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC1061
U.S. Area Sales Offices
NORTHEAST REGION Linear Technology Corporation One Oxford Valley 2300 E. Lincoln Hwy.,Suite 306 Langhorne, PA 19047 Phone: (215) 757-8578 FAX: (215) 757-5631 Linear Technology Corporation 266 Lowell St., Suite B-8 Wilmington, MA 01887 Phone: (508) 658-3881 FAX: (508) 658-2701 SOUTHEAST REGION Linear Technology Corporation 17060 Dallas Parkway Suite 208 Dallas, TX 75248 Phone: (214) 733-3071 FAX: (214) 380-5138 CENTRAL REGION Linear Technology Corporation Chesapeake Square 229 Mitchell Court, Suite A-25 Addison, IL 60101 Phone: (708) 620-6910 FAX: (708) 620-6977 SOUTHWEST REGION Linear Technology Corporation 22141 Ventura Blvd. Suite 206 Woodland Hills, CA 91364 Phone: (818) 703-0835 FAX: (818) 703-0517 NORTHWEST REGION Linear Technology Corporation 782 Sycamore Dr. Milpitas, CA 95035 Phone: (408) 428-2050 FAX: (408) 432-6331
International Sales Offices
FRANCE Linear Technology S.A.R.L. Immeuble "Le Quartz" 58 Chemin de la Justice 92290 Chatenay Malabry France Phone: 33-1-41079555 FAX: 33-1-46314613 GERMANY Linear Techonolgy GMBH Untere Hauptstr. 9 D-85386 Eching Germany Phone: 49-89-3197410 FAX: 49-89-3194821 JAPAN Linear Technology KK 5F YZ Bldg. 4-4-12 Iidabashi, Chiyoda-Ku Tokyo, 102 Japan Phone: 81-3-3237-7891 FAX: 81-3-3237-8010 KOREA Linear Technology Korea Branch Namsong Building, #505 Itaewon-Dong 260-199 Yongsan-Ku, Seoul Korea Phone: 82-2-792-1617 FAX: 82-2-792-1619 SINGAPORE Linear Technology Pte. Ltd. 101 Boon Keng Road #02-15 Kallang Ind. Estates Singapore 1233 Phone: 65-293-5322 FAX: 65-292-0398 TAIWAN Linear Technology Corporation Rm. 801, No. 46, Sec. 2 Chung Shan N. Rd. Taipei, Taiwan, R.O.C. Phone: 886-2-521-7575 FAX: 886-2-562-2285 UNITED KINGDOM Linear Technology (UK) Ltd. The Coliseum, Riverside Way Camberley, Surrey GU15 3YL United Kingdom Phone: 44-276-677676 FAX: 44-276-64851
World Headquarters
Linear Technology Corporation 1630 McCarthy Blvd. Milpitas, CA 95035-7487 Phone: (408) 432-1900 FAX: (408) 434-0507
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
LT/GP 0294 2K REV C
(c) LINEAR TECHNOLOGY CORPORATION 1994


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